1. Field of the Invention
The invention relates generally to fabrication of electronic device structures, and more particularly, to methods and systems for forming connective elements on integrated circuits for packaging applications.
2. Brief Description of the Background Art
The information in this Background Art portion of the application is provided so that the reader of the application can better understand the invention which is described subsequently. The presence of the information in this Background Art portion of the application is not an admission that the information presented or that of combination of the information presented is prior art to the invention.
One common technique for connecting integrated circuits (ICs) to printed circuit boards is with the use of “flip-chips.” In a flip chip, electrical circuits are formed on one side of the IC, and connective elements made of solder bumps (sometimes referred to as wafer bumps) are formed on a layer atop the electrical circuit. The IC is then placed, contact-side down, onto an interconnect, such as a multi-chip module, a land grid array (LGA), or ball grid array (BGA) substrate, so that the solder bumps are in firm contact with corresponding contacts disposed on the interconnect (for example, surface mount pads). The solder bumps may then be heated to melt the solder bumps and establish a solid electrical connection between the IC and the interconnect.
One method of forming solder bumps on ICs uses a patterned positive photoresist to mask the IC and define regions where solder is to be deposited (e.g., corresponding to locations where the solder bumps are desired). However, conventional positive photoresist materials are limited in the thickness to which they may be deposited. Accordingly, to deposit enough solder to form the desired solder bumps for typical applications, the solder must be overplated, thereby occupying a larger area on the upper surface of the positive photoresist. This overplating requirement limits the pitch at which the solder bumps may be formed, thereby limiting the usefulness of this technique where tighter pitches are desired.
For example, FIG. 4 depicts a substrate 402 having a plurality of wafer bumps 406 partially formed thereupon by use of a positive photoresist mask 404. The limited thickness of the positive photoresist mask 404 requires that the wafer bumps 406 be formed using an overplating process. For example, the positive photoresist mask 404 may be patterned to form a plurality of holes 408 corresponding to the locations where the wafer bumps 406 are to be formed on the substrate 402. The substrate 492 is then plated to fill the holes 408 and overplated (as indicated by 410) to form a mushroom-like shape that extends radially outwards from the holes 408 atop the surface of the positive photoresist mask 404. When the pitch (P) between the wafer bumps 406 is large, there is sufficient room for the overplating process to be performed. However, at smaller pitches, the overplated portions of the wafer bumps 406 may undesirably interfere with each other and join together (as shown at 412), thereby causing the process to fail.
With the advancement of technology, there is a growing need to further reduce the size of ICs. One of the major challenges in reducing IC size is reduction in dimensions of the components of the IC, including a corresponding reduction in the pitch of the solder bumps and contacts for mounting the IC to the interconnect. However, as discussed above, positive photoresist fabrication techniques present difficulties in attaining the desired small pitch size due to the overplating issue.
Negative photoresists, on the other hand, may be useful for the forming wafer bumps at tighter pitches. Specifically, negative photoresists may be deposited to greater thicknesses, thereby facilitating the deposition of larger volumes of solder without overplating. The elimination of the overplating requirement facilitates fabricating solder bumps having a tighter pitch. However, due to material limitations, negative photoresists are difficult to strip and typically have been used in applications where their removal is not required. As such, negative photoresists have generally not been utilized in solder bump formation applications.
Thus, there is a need for an improved method of forming connective elements for flipchip packaging.